FSM-based digital design using Verilog HDL / Peter Minns, Ian Elliott. (Record no. 17519)

000 -LEADER
fixed length control field 00544nam a2200133Ia 4500
001 - CONTROL NUMBER
control field 17519
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20261006004845.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 120911s9999 xx 000 0 und d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Minns, Peter D.
9 (RLIN) 17505
245 ## - TITLE STATEMENT
Title FSM-based digital design using Verilog HDL / Peter Minns, Ian Elliott.
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Name of publisher, distributor, etc. Chichester, England ; Hoboken, NJ : J. Wiley & Sons, c2008.
300 ## - PHYSICAL DESCRIPTION
Extent xiii, 391 p. : ill. ; 26 cm. + 1 CD-ROM.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Verilog (Computer hardware description language). Digital electronics. Sequential machine theory.
9 (RLIN) 17506
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Total checkouts Barcode Date last seen Price effective from Koha item type
        Nilai University Library Nilai University Library 09/11/2012   18909 09/11/2012 09/11/2012 Open Shelf Books